renode
renode
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
OPEN PROJECT DIRECTORY
44 projects
renode
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
FPGAwars
:snowflake: Visual editor for open FPGA boards
The-OpenROAD-Project
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
YosysHQ
nextpnr portable FPGA place and route tool
ZipCPU
A small, light weight, RISC CPU soft core
cariboulabs
CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR
ultraembedded
32-bit Superscalar RISC-V CPU
verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
YosysHQ
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
oneapi-src
Samples for Intel® oneAPI Toolkits
gdsfactory
A Python library for designing chips (Photonics, Analog, Quantum, MEMS), PCBs, and 3D-printable objects. We aim to make hardware design accessible, intuitive, and fun—empowering everyone to build the future.
chipsalliance
VeeR EH1 core
KastnerRG
Parallel Programming for FPGAs -- An open-source high-level synthesis book
Obijuan
Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
JulianKemmerer
PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
calyxir
Intermediate Language (IL) for Hardware Accelerator Generators
VLSI-EDA
The PoC Library has been forked to github.com/VHDL/PoC. See new address below
spcl
DaCe - Data Centric Parallel Programming
PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).
olofk
An abstraction library for interfacing EDA tools