HDL

riscv-mcu

e203_hbirdv2

The Ultra-Low Power RISC-V Core

MohammadYounes

rtlcss

Framework for transforming Cascading Style Sheets (CSS) from Left-To-Right (LTR) to Right-To-Left (RTL)

pulp-platform

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

ZipCPU

zipcpu

A small, light weight, RISC CPU soft core

aolofsson

oh

Verilog library for ASIC and FPGA designers

hughperkins

VeriGPU

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

ultraembedded

biriscv

32-bit Superscalar RISC-V CPU

verilog-to-routing

vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research

aappleby

metroboy

A repository of gate-level simulators and tools for the original Game Boy.

circuitvalley

USB_C_Industrial_Camera_FPGA_USB3

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

MikePopoloski

slang

SystemVerilog compiler and language services

splinedrive

kianRiscV

RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

veryl-lang

veryl

Veryl: A Modern Hardware Description Language

syntacore

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

chipsalliance

Cores-VeeR-EH1

VeeR EH1 core

WangXuan95

FPGA-USB-Device

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-speed) device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

alexforencich

verilog-axis

Verilog AXI stream components for FPGA implementation

open-sdr

openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

lvyufeng

step_into_mips

一步一步写MIPS CPU

nickg

nvc

VHDL compiler and simulator

Obijuan

open-fpga-verilog-tutorial

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

eldraco

Salamandra

Salamandra is a tool to find spy microphones that use radio freq to transmit. It uses SDR.

PyHDI

Pyverilog

Python-based Hardware Design Processing Toolkit for Verilog HDL

rejunity

z80-open-silicon

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.